Patrick Nadeau Email
Principal Architect | FPGA @ Thales
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Patrick Nadeau Location
- Montreal, QC, CA
Patrick Nadeau Work
- Principal Architect | FPGA @ (August 2026 - Present)
- Engineering Manager | Digital Electronics | FPGA and DSP Development @ (October 2023 - July 2026)
- Senior Member of Technical Staff | Lead FPGA Designer @ (December 2022 - October 2023)
- Technical Lead | FPGA and Digital Electronics @ (October 2020 - December 2022)
- Senior Designer | Team lead | FPGA and Digital Electronics @ (September 2019 - October 2020)
- Principal FPGA Designer | Team lead | DO-254 Specialist @ (October 2014 - September 2019)
- Senior FPGA Designer @ (October 2010 - October 2014)
- FPGA Designer @ (December 2007 - October 2010)
- FPGA Verication @ (January 2007 - December 2007)
- ASIC Designer @ Polystim neurotechnologies (September 2004 - December 2006)
Patrick Nadeau Education
- Polytechnique Montréal
M.Sc.A. (Microelectronics)
2004-2006 - Polytechnique Montréal
B.Ing (Electronics)
2000-2004
Patrick Nadeau Summary
- Patrick Nadeau, based in Montreal, QC, CA, is currently a Principal Architect | FPGA at Thales. Patrick Nadeau brings experience from previous roles at MDA Space and LeddarTech. Patrick Nadeau holds a 2004 - 2006 M.Sc.A. in Microelectronics @ Polytechnique Montréal. Patrick Nadeau has 1 emails on RocketReach.
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