Patrick Howe Email & Phone Number
Silicon Digital Design Engineer IV @ Meta
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Patrick Howe Location
- Seattle, WA, US
Patrick Howe Work
- 2024 -2025 Research Assistant @
- 2024 -now Silicon Digital Design Engineer IV @
- 2023 -2024 Research Assistant @
- 2022 -2023 Machine Learning Computer Architect @
- 2020 -2022 Technical Lead, Digital Design @
- 2019 -2020 Senior Digital Design Engineer @
- 2017 -2019 FPGA Engineer @
- 2015 -2017 Research Assistant @
Patrick Howe Education
- University of Washington 2024-2027
- University of Washington
Non-Matriculated (Parallel computer architecture and deep learning)
2023-2023 - University of Washington
Bachelor’s Degree (Electrical Engineering)
2012-2015 - Spokane Falls Community College
Associate of Arts (A.A.)
2010-2012
Patrick Howe Skills
- Python
- SystemVerilog
- Altera Quartus
- UVM
- Embedded Systems
- Vivado
- Computer Architecture
- Synthesis
- VLSI
- Verilog
- Linux
- Field Programmable Gate Arrays Fpga
- VCS
- Xilinx
- C
- C++
- TCL
- RTL design
- Field Programmable Gate Arrays
Patrick Howe Summary
- Patrick Howe, based in Seattle, WA, US, is currently a Silicon Digital Design Engineer IV at Meta. Patrick Howe brings experience from previous roles at University of Washington, Micron Technology and Pacific Defense. Patrick Howe holds a 2024 - 2027 University of Washington. With a robust skill set that includes Python, SystemVerilog, Altera Quartus, UVM, Embedded Systems and more. Patrick Howe has 1 emails on RocketReach.
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