Parmeet Singh Email & Phone Number
Staff Design Engineer @ Qualcomm
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Parmeet Singh Location
- San Jose, CA, US
Parmeet Singh Work
- Staff Design Engineer @ (April 2023 - Present)
- Senior Logic Design Engineer @ (August 2021 - April 2023)
- Senior Design Engineer @ (November 2019 - August 2021)
- ASIC Design Engineer @ (April 2016 - November 2019)
- PDK Development Engineer @ (July 2015 - March 2016)
- Customer Service Representative @ (August 2013 - May 2015)
- Technical Intern @ Reliance Infrastructure (June 2012 - May 2013)
Parmeet Singh Education
- University of Southern California
Master's Degree (Electrical and Electronics Engineering)
2013-2015 - University of Mumbai
Bachelor's Degree (Electrical and Electronics Engineering)
2009-2013
Parmeet Singh Skills
- ASIC
- Analog
- Analog Circuit Design
- Application-Specific Integrated Circuits (ASIC)
- C
- C++
- CDC
- Cadence
- Cadence Spectre
- Cadence Virtuoso
- Circuit Design
- Computer Architecture
- Customer Service
- Digital Electronics
- Digital Signal Processing
- Digital Signal Processors
- Electrical Engineering
- Electronics
- Embedded Systems
- FPGA
- IC
- Java
- LabVIEW
- Lint
- Linux
- Mathematica
- Matlab
- Microprocessors
- Microsoft Office
- ModelSim
- PSpice
- Programming
- RTL Coding
- RTL Design
- SPICE
- STA
- Scripting
- Signal Processing
- Simulations
- Synthesis
- Tcl
- Teamwork
- VHDL
- VLSI
- Verilog
- Very-Large-Scale Integration (VLSI)
- Xilinx
- Xilinx ISE
- perl
- spyglass
- Microsoft Excel
- Microsoft Word
- PowerPoint
- Robotics
- Microcontrollers
- AutoCAD
- Windows
- Engineering
- Image Processing
- English
- Application Specific Integrated Circuits Asic
- Very Large Scale Integration Vlsi
- Application Specific Integrated Circuits
- Very Large Scale Integration
Parmeet Singh Summary
- Parmeet Singh, based in San Jose, CA, US, is currently a Staff Design Engineer at Qualcomm. Parmeet Singh brings experience from previous roles at Intel Corporation, Xilinx, Spreadtrum and Silvaco Inc. Parmeet Singh holds a 2013 - 2015 Master's Degree in Electrical and Electronics Engineering @ University of Southern California. With a robust skill set that includes ASIC, Analog, Analog Circuit Design, Application-Specific Integrated Circuits (ASIC), C and more. Parmeet Singh has 3 mobile phone numbers on RocketReach.
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