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Parimal C. Location
Ahmedabad, GJ, IN
Parimal C. Work
Senior Lead Engineer @ (January 2026 - Present)
Senior Physical Design Engineer @ (May 2024 - December 2025)
ASIC Physical Design Engineer @ (July 2019 - May 2024)
Intern @ eiTRA - eInfochips Training & Research Academy Ltd (January 2019 - June 2019)
Parimal C. Education
Institute of Technology, Nirma University
Bachelor of Technology (Electronics and communication)
2016-2019
Parimal C. Skills
Place & Route
Design Rule Checking (DRC)
Clock Tree Synthesis
Fusion compiler
Low-power Design
Physical Design
TCL
PNR
Very-Large-Scale Integration (VLSI)
ICC
Cadence Innovus
Floorplanning
Perl-Tk
Static Timing Analysis
Parimal C. Summary
Parimal C., based in Ahmedabad, GJ, IN, is currently a Senior Lead Engineer at Qualcomm. Parimal C. brings experience from previous roles at Qualcomm, eInfochips (An Arrow Company) and eiTRA - eInfochips Training & Research Academy Ltd. Parimal C. holds a 2016 - 2019 Bachelor of Technology in Electronics and communication @ Institute of Technology, Nirma University. With a robust skill set that includes Place & Route, Design Rule Checking (DRC), Clock Tree Synthesis, Fusion compiler, Low-power Design and more. Parimal C. has 1 emails on RocketReach.
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