Pankaj Desai Email & Phone Number
Senior Staff Engineer, ASIC design @ Aviva Links
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Pankaj Desai Location
- San Jose, CA, US
Pankaj Desai Work
- 2021 -now Senior Staff Engineer, ASIC design @
- 2019 -2020 Staff Engineer @
- 2017 -2019 Sr Member Of Technical Staff @ Aquantia
- 2016 -2017 Member of Technical Staff I @ Aquantia
- 2014 -2016 Senior Engineer, ASIC Design @
- 2011 -2014 Member of Technical staff - ASIC @
- 2011 -2011 Trainee Engineer. @
Pankaj Desai Education
- Ganpat University
B.Tech. (Electronics and Communication Engineering)
2007-2011 - St. Xavier's High School, Deesa
High School (HSC)
2005-2007
Pankaj Desai Skills
- Logic Design
- Field Programmable Gate Arrays Fpga
- Amba Axi
- System On A Chip Soc
- Unit Testing
- Logic Synthesis
- RTL design
- PCIe
- ASIC
- AMBA AHB
- Lint
- VLSI
- Verilog
- Integrated Circuit Design
- Integrated Circuit
- Testing
- Application Specific Integrated Circuits Asic
- FPGA
- SoC
- Checks
- RTL coding
- Juniper
- ModelSim
- SystemVerilog
- Design
- Static Timing Analysis
- Low Power Design
- Very Large Scale Integration Vlsi
- Microarchitecture
- I2C
- Power Analysis
- Asic Design
- Application Specific Integrated Circuits
- System on a Chip
- Very Large Scale Integration
- Field Programmable Gate Arrays
Pankaj Desai Summary
- Pankaj Desai, based in San Jose, CA, US, is currently a Senior Staff Engineer, ASIC design at Aviva Links. Pankaj Desai brings experience from previous roles at Marvell Semiconductor, Aquantia and CSR (Acquired by Qualcomm). Pankaj Desai holds a 2007 - 2011 B.Tech. in Electronics and Communication Engineering @ Ganpat University. With a robust skill set that includes Logic Design, Field Programmable Gate Arrays Fpga, Amba Axi, System On A Chip Soc, Unit Testing and more. Pankaj Desai has 2 emails and 3 mobile phone numbers on RocketReach.
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