Pan Email & Phone Number

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Senior Principal Reliability Engineer, CPO, NPO, Silicon Photonics @ (June 2026 - Present)
Technical Lead, Silicon Photonics R and D RELIABILITY ENGINEER @ (October 2021 - May 2026)
Senior Staff Transceiver and Silicon Photonics Engineer @ (January 2019 - October 2021)
STAFF PRODUCT ENGINEER @ (October 2012 - January 2019)
SENIOR QUALITY AND RELIABILITY ENGINEER @ (January 2005 - January 2010)
Director of Technology Development @ Oplink Telecommunications, Inc (January 2004 - January 2005)
Engineer Manager @ Blueskyresearch (January 2002 - January 2004)
Staff Manufacturing Engineer @ (January 2001 - January 2002)
Senior Product Development Engineer @ JDS Uniphase (September 1996 - January 2001)
Senior Product Development Engineer @ Wuhan Research Institute of Posts and Telecommunications (August 1986 - August 1996)

400G optical Transceiver
AEC-Q102, IEEE 802.3, PCIe, MIL-STD-883, SR-332, JESD74A, GR-468, GR-1221, JEDEC, ISO9001
Design for Manufacturing, Quality, Reliability, Test, Cost...
EDFA
FMEA, DFx, DOE, FA, RMA
Failure Analysis
Fiber Optics
Free space optics simulation
IEEE 802.3
JMP
Keysight and Tektronix Sampling Oscilloscope, Keysight and Anritsu BERT, TDR and VNA, JMP, Weibull++, Python/PyVISA, Zemax, Matlab, SQL, KLayout, Agile.
LiDAR
Manufacturing Operations
NPI, Product management, ECO, PCN, PDN.
Optical lens design
PCIe
Printed Circuit Board (PCB) Design and schematic design
Product Development
Product Management
Program management, supply chain management, contract negotiation.
Python (Programming Language)
Quality Control
Quality Management
Reliability burn-in and testing infrastructure development, data acquisition and instrument automation
Reliability modeling, accelerate life testing, reliability improvement.
Silicon Photonics
Six Sigma Black Belt
Statistical Data Analysis
Test Automation
Zemax
high speed electrical and optical signal validation
optical packaging
Telecommunications
Customer Service
Reliability Engineering
Holography

Pan, based in Fremont, CA, US, is currently a Senior Principal Reliability Engineer, CPO, NPO, Silicon Photonics at Astera Labs. Pan brings experience from previous roles at Intel Corporation, Juniper Networks, Lumentum and Intel. With a robust skill set that includes 400G optical Transceiver, AEC-Q102, IEEE 802.3, PCIe, MIL-STD-883, SR-332, JESD74A, GR-468, GR-1221, JEDEC, ISO9001, Design for Manufacturing, Quality, Reliability, Test, Cost..., EDFA, FMEA, DFx, DOE, FA, RMA and more. Pan has 1 emails and 2 mobile phone numbers on RocketReach.

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