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Pallavi Kumar Location
Fremont, CA, US
Pallavi Kumar Work
Senior Member of Technical Staff @ (July 2024 - Present)
Engineering Manager @ (October 2022 - Present)
Staff Design Engineer @ (July 2021 - Present)
Lead Design Verification Engineer @ (January 2015 - July 2021)
Graphics Hardware Engineer @ (June 2011 - January 2015)
Student Research Assistant @ (December 2009 - May 2011)
Assistant System Engineer @ (October 2007 - June 2009)
Student Intern @ (January 2007 - May 2007)
Pallavi Kumar Education
University of Southern California
MS EE (VLSI)
2009-2011
Anna University Chennai
BS (Electrical And Electronics Engineering)
2003-2007
Pallavi Kumar Skills
ASIC
AXI
Analog Circuit Design
Analytic Problem Solving
Analytical Skills
C++
C/C++ Programming
Cadence Virtuoso
DDR4
Diagnosis and Design of reliable digital systems
Digital
Digital design
Dynamic Random-Access Memory (DRAM)
Field-Programmable Gate Arrays (FPGA)
Functional Verification
Integrated Circuit Design
Logic Synthesis
Memory Controllers
ModelSim
Performance Verification
Perl
RTL Design
SPICE
Scripting
Semiconductors
Simulations
Synopsys tools
SystemVerilog
Test Coverage
Testing
Universal Verification Methodology (UVM)
VHDL
VLSI
Verdi
Verilog
synopsis tools
Leadership
PowerPoint
Integrated Circuit
Microsoft Office
Microsoft Word
Research
Logic Design
Analog
Layout
SoC
Design
Asic Design
Integration
IC
Pallavi Kumar Summary
Pallavi Kumar, based in Fremont, CA, US, is currently a Engineering Manager at AMD. Pallavi Kumar brings experience from previous roles at AMD and Intel Corporation. Pallavi Kumar holds a 2009 - 2011 MS EE in VLSI @ University of Southern California. With a robust skill set that includes ASIC, AXI, Analog Circuit Design, Analytic Problem Solving, Analytical Skills and more. Pallavi Kumar has 3 emails and 4 mobile phone numbers on RocketReach.
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