Niravkumar Patel Email & Phone Number

Design Verification Engineer @ AMD

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Niravkumar Patel Location

Chandler, AZ, US

Niravkumar Patel Work

2026 - now Design Verification Engineer @ AMD
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2024 - 2026 Design Verification Engineer @ HCL America, Inc.
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2019 - 2024 Design Verification Engineer @ Intel Corporation
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2015 - 2019 Design Engineer @ Intel Corporation
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2012 - 2015 Design Engineer @ Microchip Technology Inc.
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2008 - 2008 Student Assistant @ San Jose State University
2007 - 2007 Intern @ Twin Antenna

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Niravkumar Patel Education

San Jose State University
Master of Science (MS), Electrical Engineer (Electrical Engineer)
2008 - 2010
Hemchandracharya North Gujarat University
Bachelor of Engineering - BE, Electronics & Communication (Electronics & Communication)
2003 - 2007

Niravkumar Patel Skills

SystemVerilog
Hardware Architecture
Static Timing Analysis

Cadence Virtuoso
RTL coding
VLSI
Verilog
SoC
Very Large Scale Integration Vlsi
VHDL

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Niravkumar Patel Summary

Niravkumar Patel, based in Chandler, AZ, US, is currently a Design Verification Engineer at AMD. Niravkumar Patel brings experience from previous roles at HCLTech, Intel Corporation and Microchip Technology. Niravkumar Patel holds a 2008 - 2010 Master of Science (MS), Electrical Engineer in Electrical Engineer @ San Jose State University. With a robust skill set that includes SystemVerilog, Hardware Architecture, Static Timing Analysis, Cadence Virtuoso, RTL coding and more. Niravkumar Patel has 2 emails and 1 mobile phone numbers on RocketReach.

Niravkumar Patel Emails

Found 2 emails

Niravkumar Patel Phone Numbers

Found 3 phone numbers

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Niravkumar Patel

Design Verification Engineer at AMD

Chandler, AZ, US
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- gmail.com
- amd.com
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- +1 916-468-XXXX
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- gmail.com
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Multi Site Revenue Manager at Sircle Collection

London, England, GB
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- sirclecollection.com
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- +852 2921 XXXX
Niravkumar Patel

Technical Sales Specialist at AMETEK Process Instruments

Calgary, AB, CA
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- +1 917-379-XXXX
- +1 302-898-XXXX
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