Ninge Nanjappa's Location
Bengaluru, KA, IN
Ninge Nanjappa's Work
- Tech-Lead and RF and AMS IC Layout @ EnSilica
- Tech Lead @ EnSilica
- Technical Team Lead and Manager @ Intel(Altran)
- Full-custom IC Layout and Mask Design Engineer; Analog Layout Deisgn @ Xilinx
- Senior Designer II, RF and AMS Custom Layout @ MegaChips Corporation
- Full Custom IC Layout Design Specialist @ Synopsys Inc
- Senior Engineer @ Qualcomm
- Lead, Analog Layout on Contarct @ Rambus
- Design Specialist, Layout Mask @ onsemi
- Member Design Team @ PulseCore Semiconductor Inc
Ninge Nanjappa's Education
- IC Layout Design And Engineering Universe
Layout Mask Design and Research Student (IC Layout Design & Engineering)
2004 - 2021 - Bangalore University
IC Layout Design and Engineering (VLSI and ULSI IC Design)
2006 - 2014 - Board of Technical Education, Karnataka State
Electronics; Diploma (Electronics and communication Engineering)
1999 - 2003
- KS polytechnic
Diploma (Electronics and Telecommunication)
2000 - 2003 - GSRHS
SSLC (Science And MatheMatics)
1994 - 1998
Ninge Nanjappa's Skills
- Layout Design
- DRC
- LVS
- Floorplanning
- Physical Verification
- Analog
- CMOS
- Semiconductors
- Mixed Signal
- VLSI
Ninge Nanjappa's Summary
Ninge Nanjappa, based in Bengaluru, KA, IN, is currently a Tech-Lead and RF and AMS IC Layout at EnSilica, bringing experience from previous roles at EnSilica, Intel(Altran), Xilinx and Megachips-Corporation. Ninge Nanjappa holds a 2004 - 2021 Layout Mask Design and Research Student in IC Layout Design & Engineering @ IC Layout Design And Engineering Universe. With a robust skill set that includes Layout Design, DRC, LVS, Floorplanning, Physical Verification and more, Ninge Nanjappa contributes valuable insights to the industry. Ninge Nanjappa has 2 emails on RocketReach.
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