Ning Xue Email & Phone Number
ASIC Design, MTS @ Etched.ai
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Ning Xue Location
- San Jose, CA, US
Ning Xue Work
- 2026 -now ASIC Design, MTS @
- 2023 -2026 Mobile GPU Micro-architect and Design @
- 2020 -2023 Silicon Graphics Pipeline and Machine Learning Architect and Design @
- 2017 -2020 Principal Design, Intel AI (formerly Nervana Systems) @
- 2016 -2017 Sr. Manager, Programmable Hardware Engineering (Altera) @
- 2012 -2016 Sr. Manager, IP Engineering @
- 2002 -2012 Project lead and Manager and Sr Manager, IC design @ Altera Corp.
- 2000 -2002 Sr. engineer, ASIC design @ Cyras Systems (acquired by Ciena)
- 1996 -2000 Sr. staff design engineer @ Lsi Logic (Broadcom Limited)
Ning Xue Education
- University of California, Berkeley
BSEE (EE)
- University of Illinois Urbana-Champaign
MS (ECE)
- Tsinghua University
Dept of EE
Ning Xue Skills
- FPGA
- Verilog
- PCIe
- IC
- ASIC
- SoC
- Integrated Circuit Design
- Photoshop
- Management
- Program Management
- Illustrator
- Integration
Ning Xue Summary
- Ning Xue, based in San Jose, CA, US, is currently a ASIC Design, MTS at Etched. Ning Xue brings experience from previous roles at Samsung Semiconductor US, Facebook and Intel Corporation. Ning Xue holds a BSEE in EE @ University of California, Berkeley. With a robust skill set that includes FPGA, Verilog, PCIe, IC, ASIC and more. Ning Xue has 2 emails and 3 mobile phone numbers on RocketReach.
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