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Naveen Thomas Location
Sacramento, CA, US
Naveen Thomas Work
2024 -now MTS Analog design Engineer @
2022 -now Senior Analog Design Engineer @
2019 -2022 Senior Design Engineer @
2016 -2019 Analog and Mixed Signal Design @
2016 -2016 Analog Design Intern @
Naveen Thomas Education
Texas A&M University 2013-2015
Cochin University of Science and Technology 2007-2011
Naveen Thomas Skills
SerDes
High Speed Interfaces
CDRs
RF
PLL
Wide-band LNA
Integrated Circuit Design
Mixed Signal
Analog
TIA
Analog Circuit Design
Cadence Spectre
Cadence Virtuoso
Matlab
VLSI
Pspice
C++
Microsoft Office
Simulations
C
LTSpice
Spectre
Testing
Programming
Multisim
LaTeX
CMOS
LDO
Bandgap References
Integrated Circuits (IC)
Circuit Design
Agilent ADS
Semiconductors
Radio Frequency (RF)
Very-Large-Scale Integration (VLSI)
Radio Frequency Rf
Integrated Circuit
Integrated Circuits Ic
Wide Band Lna
Very Large Scale Integration Vlsi
Very Large Scale Integration
Radio Frequency
Integrated Circuits
Naveen Thomas Summary
Naveen Thomas, based in Sacramento, CA, US, is currently a MTS Analog design Engineer at AMD. Naveen Thomas brings experience from previous roles at AMD, Western Digital, Gigacom Semiconductor LLC and IDT - Integrated Device Technology, Inc.. Naveen Thomas holds a 2013 - 2015 Texas A&M University. With a robust skill set that includes SerDes, High Speed Interfaces, CDRs, RF, PLL and more. Naveen Thomas has 2 emails and 3 mobile phone numbers on RocketReach.
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