Naveen Narayan Email & Phone Number
Senior Component Design Engineer @ Intel Corporation
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Naveen Narayan Location
- Irvine, CA, US
Naveen Narayan Work
- Senior Component Design Engineer @ (March 2001 - Present)
Naveen Narayan Education
- University of Arizona
MS (Electrical and Computer Engineering)
1998-2001 - RV College Of Engineering
BE (Instrumentation and Electronics)
1993-1997
Naveen Narayan Skills
- SystemVerilog
- Verilog
- ASIC
- RTL design
- SoC
- VLSI
- EDA
- IC
- Debugging
- Processors
- TCL
- Logic Design
- Computer Architecture
- Timing Closure
- Static Timing Analysis
- FPGA
- Embedded Systems
- Microprocessors
- Functional Verification
- Low-power Design
- Semiconductors
- Physical Design
- C
- VHDL
- System On A Chip Soc
- Application Specific Integrated Circuits Asic
- Low Power Design
- Very Large Scale Integration Vlsi
- Application Specific Integrated Circuits
- System on a Chip
- Very Large Scale Integration
Naveen Narayan Summary
- Naveen Narayan, based in Irvine, CA, US, is currently a Senior Component Design Engineer at Intel. Naveen Narayan holds a 1998 - 2001 MS in Electrical and Computer Engineering @ University of Arizona. With a robust skill set that includes SystemVerilog, Verilog, ASIC, RTL design, SoC and more. Naveen Narayan has 2 emails and 1 mobile phone numbers on RocketReach.
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