Naveen D Email
Sr. Silicon Design Engineer @ AMD
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Naveen D Location
- Bengaluru, KA, IN
Naveen D Work
- 2021 -now Sr. Silicon Design Engineer @
- 2015 -2015 Trainee @ SVM Micro sysstems.
- 2014 -2015 Verification of a Digital Video Broadcoasting -Satellite services to Handheld Devices(DVB_SH) IP. @ Advanced Numerical Research and Analysis Group (ANURAG) ,DRDO.
- 2011 -2011 Hybrid Encoded Booth Multiplier with RSA Technique (RSAT). @ Synopsys Compiler Tool
Naveen D Education
- Indian Institute of Science (IISc) 2018-2019
- Chaitanya Bharathi Institute Of Technology 2013-2015
- Jawaharlal Nehru Technological University 2007-2011
Naveen D Summary
- Naveen D, based in Bengaluru, KA, IN, is currently a Sr. Silicon Design Engineer at AMD. Naveen D brings experience from previous roles at SVM Micro sysstems., Advanced Numerical Research and Analysis Group (ANURAG) ,DRDO. and Synopsys Compiler Tool. Naveen D holds a 2018 - 2019 Indian Institute of Science (IISc). Naveen D has 1 emails on RocketReach.
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