Naresh H Email
Analog Layout Design Engineer @ Intel Corporation
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Naresh H Location
- Udupi, KA, IN
Naresh H Work
- Analog Layout Design Engineer @ (July 2024 - Present)
- Layout Design Intern @ (April 2023 - September 2023)
- Layout trainee @ Epitome Circuits (August 2022 - May 2023)
- Memory Circuit Design Engineer @ (October 2023 - June 2024)
- Analog layout intern @ (December 2022 - January 2023)
Naresh H Education
- Dayananda Sagar College of Engineering, BANGALORE
Bachelor of Engineering - BE (Electrical, Electronics and Communications Engineering)
2019-2023
Naresh H Summary
- Naresh H, based in Udupi, KA, IN, is currently a Analog Layout Design Engineer at Intel Corporation. Naresh H brings experience from previous roles at DXCorr Design Inc, Epitome Circuits and AB Circuits and Research Labs (ABCRL). Naresh H holds a 2019 - 2023 Bachelor of Engineering - BE in Electrical, Electronics and Communications Engineering @ Dayananda Sagar College of Engineering, BANGALORE. Naresh H has 2 emails on RocketReach.
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