Narasimha Murthy Email & Phone Number
Chip design @ Apple
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Narasimha Murthy Location
- Sunnyvale, CA, US
Narasimha Murthy Work
- chip design @ (August 2015 - Present)
- Senior ASIC design engineer @ (March 2007 - July 2015)
- senior member of tech staff @ (September 2000 - February 2007)
- ASIC design Engineer @ CMOS Chips (and CMOS Soft) Inc (October 1998 - August 2000)
Narasimha Murthy Education
- Indian Institute of Technology, Delhi
Masters (Control systems)
1996-1998 - Annamalai University
BE (Electronics and Instrumentation)
1990-1994
Narasimha Murthy Skills
- ASIC
- High speed memory interfaces for DDR2/3/4 RLDRAM2/3 memory, cache pipelines.
- Logic Synthesis
- RTL design
- Static Timing Analysis
- SystemVerilog
- Verilog
Narasimha Murthy Summary
- Narasimha Murthy, based in Sunnyvale, CA, US, is currently a chip design at Apple. Narasimha Murthy brings experience from previous roles at Ericsson, Transmeta corporation and CMOS Chips (and CMOS Soft) Inc. Narasimha Murthy holds a 1996 - 1998 Masters in Control systems @ Indian Institute of Technology, Delhi. With a robust skill set that includes ASIC, High speed memory interfaces for DDR2/3/4 RLDRAM2/3 memory, cache pipelines., Logic Synthesis, RTL design, Static Timing Analysis and more. Narasimha Murthy has 1 emails on RocketReach.
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