Mor Slai Email

FPGA Lead @ Celare

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Mor Slai's Location

Israel

Mor Slai's Work

FPGA Lead @ Celare
FPGA prototype eng. at the wireless group @ Intel Corporation
Logic Design Engineer (FPGA and ASIC) @ Ethernity Networks

Senior logic design eng. @ Xperi Inc.
UWB PHY logic design Eng. (ASIC) @ Wisair
FPGA logic design eng. @ RADCOM

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Mor Slai's Education

Technion-Machon Technologi Le' Israel
Bachelor of Science (BSc) (Electrical, Electronics and Communications Engineering)
2001 - 2006
Hi tech

Mor Slai's Skills

ASIC
Verilog
VLSI

VHDL
Logic Design
FPGA
RTL design
PCIe
RTL coding
PHY

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Mor Slai's Summary

Mor Slai, based in Israel, is currently a FPGA Lead at Celare, bringing experience from previous roles at Intel Corporation, Ethernity Networks, Tessera and Wisair. Mor Slai holds a 2001 - 2006 Bachelor of Science (BSc) in Electrical, Electronics and Communications Engineering @ Technion-Machon Technologi Le' Israel. With a robust skill set that includes ASIC, Verilog, VLSI, VHDL, Logic Design and more, Mor Slai contributes valuable insights to the industry. Mor Slai has 2 emails on RocketReach.