Mokhtar Hirech Email & Phone Number
Principal Software Engineer, CTO office, Advanced Technology Team @ Arteris
Mokhtar Hirech's Location
Sunnyvale, CA, US
Mokhtar Hirech's Work
- Principal Software Engineer, CTO office, Advanced Technology Team @ Arteris
- Senior Staff R and D Engineer - IC Compiler post-route optimization @ Synopsys Inc
- ARCHITECT - Responsible for Integration of Tessent DFT prods into “Place first” Oasys-RTL synthesis @ Mentor Graphics
- Senior Staff R and D Engineer - Responsible for design optimization in the Design Compiler team @ Synopsys Inc
- Senior Staff R and D Engineer - Software architect, consultant and technical lead for low power support @ Synopsys Inc
- Staff R and D Engineer - Lead Engineer @ Synopsys Inc
- Senior R and D Engineer I and II - Software development engineer @ Synopsys Inc
- Post-Doctoral Researcher @ Université Pierre et Marie Curie (Paris VI), MASI (now LIP6) Laboratory
- PhD Researcher @ Université Pierre et Marie Curie (Paris VI), MASI (now LIP6) lab.
- R and D Engineer and PhD Researcher @ BULL SA, Clayes/Bois, France
Mokhtar Hirech's Education
- Pierre and Marie Curie University
PhD
1989 - 1994 - Pierre and Marie Curie University
MSc
1987 - 1988 - Ecole nationale Superieure d'Informatique (ESI)
Engineer Degree
1981 - 1986
Mokhtar Hirech's Skills
- EDA
- VLSI
- SoC
- DFT
- C
- Algorithms
- Testing
- Data Structures
- ATPG
- C++
Mokhtar Hirech's Summary
Mokhtar Hirech, based in Sunnyvale, CA, US, is currently a Principal Software Engineer, CTO office, Advanced Technology Team at Arteris IP, bringing experience from previous roles at Synopsys Inc, Mentor Graphics and Synopsys Inc.. Mokhtar Hirech holds a 1989 - 1994 PhD @ Pierre and Marie Curie University. With a robust skill set that includes EDA, VLSI, SoC, DFT, C and more, Mokhtar Hirech contributes valuable insights to the industry. Mokhtar Hirech has 3 emails and 1 mobile phone number on RocketReach.
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