Senior Design Verification Engineer @ (October 2022 - August 2025)
Mixed Signal Verification @ (June 2015 - January 2019)
Mixed Signal Designer @ (January 2011 - June 2015)
Design Engineer @ (January 2019 - October 2022)
Mitchell Levine Education
Georgia Institute of Technology
Master of Science (MS) (Electrical and Electronics Engineering)
2009-2010
University of Florida
Bachelor of Science (BS) (Electrical and Electronics Engineering)
2004-2009
Mitchell Levine Skills
Python
Verilog Ams
Mixed Signal
Analog
ASIC
CMOS
Semiconductor Industry
PyQt
SoC
Verilog
EDA
Analog Circuit Design
Skill Programming
IC
Mitchell Levine Summary
Mitchell Levine, based in Texas, United States, is currently a Senior Physical Design Engineer at QuickLogic Corporation. Mitchell Levine brings experience from previous roles at Nexperia, Semtech, Texas Instruments and LinearASICs. Mitchell Levine holds a 2009 - 2010 Master of Science (MS) in Electrical and Electronics Engineering @ Georgia Institute of Technology. With a robust skill set that includes Python, Verilog Ams, Mixed Signal, Analog, ASIC and more. Mitchell Levine has 1 emails and 2 mobile phone numbers on RocketReach.
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