Lead Physical Design Engineer @ (April 2020 - June 2023)
Senior Physical Design Engineer @ (October 2019 - March 2020)
Senior Physical Design Engineer @ (October 2017 - October 2019)
Physical Design Engineer @ (October 2015 - September 2017)
Physical Design Engineer @ (February 2014 - September 2015)
Minh Thai Education
Post and Telecommunication Institute of Technology
Bachelor of Engineering (B.E.) (Electronic and Telecommunication)
2009-2014
Semicon Integrated Circuit Design Training Center 2012-2013
Minh Thai Skills
Static Timing Analysis
Logic Synthesis
ASIC
Clock Tree Synthesis
Verilog language
RTL design
Linux
ASIC design
PNR
Perl
TCL
ICC
Timing Closure
Floorplanning
Physical Design
DRC
LVS
EDI
Physical Verification
Verilog
Minh Thai Summary
Minh Thai, based in Austin, TX, US, is currently a Principal Physical Design Engineer at NXP Semiconductors. Minh Thai brings experience from previous roles at TSMC and Synapse Design Inc.. Minh Thai holds a 2009 - 2014 Bachelor of Engineering (B.E.) in Electronic and Telecommunication @ Post and Telecommunication Institute of Technology. With a robust skill set that includes Static Timing Analysis, Logic Synthesis, ASIC, Clock Tree Synthesis, Verilog language and more. Minh Thai has 1 emails and 1 mobile phone numbers on RocketReach.
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