Min Maung Email & Phone Number
Principal Design Engineer at Microsoft Corporation @ Microsoft
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Min Maung Location
- Fremont, CA, US
Min Maung Work
- 2022 -now Principal Design Engineer at Microsoft Corporation @
- 2015 -now SoC Design Engineer and Manager @
- 2014 -2015 Senior Member of Technical Staff and Manager (HSSI PHY) @ Altera
- 2013 -2013 ASIC Design Lead @ Altera
- 2012 -2013 Full-Chip Integration Lead @ Altera
- 2007 -2012 ASIC Design Engineer and Lead (Member of Technical Staff) @ Altera
- 2011 -2012 Design Security Contractor @ Altera
- 2002 -2007 Senior Design Engineer @ Altera
- 2000 -2001 Design Engineer @ Altera
- 1999 -1999 Internship @
Min Maung Education
- University of California, Berkeley 1997-1999
- City College of San Francisco 1995-1998
Min Maung Skills
- Static Timing Analysis
- ASIC
- Verilog
- SoC
- FPGA
- Semiconductors
- Integrated Circuit Design
- IC
- Mixed Signal
- EDA
- RTL design
- CMOS
- Floorplanning
- Hardware Architecture
- Debugging
- Analog
- System on a Chip Soc
- PowerPoint
- Java
- Graphics
- Ic Design
- Design
- Integrated Circuits Ic
- Manufacturing
- Marketing
- Leadership
- Field Programmable Gate Arrays Fpga
- High Speed Serial Protocols Pcie
- Etherenet And Cpri
- Field Programmable Gate Arrays
- System on a Chip
- Integrated Circuits
- High Speed Serial Protocols
Min Maung Summary
- Min Maung, based in Fremont, CA, US, is currently a Principal Design Engineer at Microsoft Corporation at Microsoft. Min Maung brings experience from previous roles at Intel Corporation and Altera. Min Maung holds a 1997 - 1999 University of California, Berkeley. With a robust skill set that includes Static Timing Analysis, ASIC, Verilog, SoC, FPGA and more. Min Maung has 3 emails and 3 mobile phone numbers on RocketReach.
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