Milos Lazic Email
Senior IC layout Engineer @ Capgemini Engineering
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Milos Lazic Location
- Belgrade, RS
Milos Lazic Work
- 2024 -now Senior IC layout Engineer @
- 2021 -2024 Senior IC layout engineer @
- 2015 -2021 Analog IC layout engineer @
- 2014 -2015 SoC Verification Engineer @
- 2014 -2015 SoC Verification Engineer @
- 2012 -2012 Internship @
Milos Lazic Education
- Univerzitet u Nišu
Master's degree (Electrical and Electronics Engineering)
2007-2013
Milos Lazic Skills
- DRC
- Analog
- ASIC
- CMOS
- Electronics
- LVS
- Cadence Virtuoso
- Cadence Icfb
- Unix
- Floorplanning
- Integrated Circuit Design
- VHDL
- EDA
- Analog Circuit Design
- Cadence
- IC layout
- Bandgap
- Pvs
- Signal Flow
- SPICE
Milos Lazic Summary
- Milos Lazic, based in Belgrade, RS, is currently a Senior IC layout Engineer at Capgemini Engineering. Milos Lazic brings experience from previous roles at ELSYS Eastern Europe, High Tech Engineering Center and Intel Corporation. Milos Lazic holds a 2007 - 2013 Master's degree in Electrical and Electronics Engineering @ Univerzitet u Nišu. With a robust skill set that includes DRC, Analog, ASIC, CMOS, Electronics and more. Milos Lazic has 2 emails on RocketReach.
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