Mike Babb Email & Phone Number

Mike Babb Skills

• Mixed Signal
• Integrated Circuit Design
• ASIC
• SystemVerilog
• Primetime
• RTL design
• RTL
• Low-power Design
• Static Timing Analysis
• Circuit Design
• Behavioral Modeling
• Spectre
• Verilog-AMS
• CMOS
• Functional Verification
• DFT
• EDA
• RTL coding
• Cadence Virtuoso
• NCSim
• Power Management
• VLSI
• Timing Closure
• DRC
• SPICE
• Verilog-A
• System Verification
• Chip Architecture
• Engineering Design
• Physical Design
• IC
• Cadence
• Logic Design
• ModelSim
• NC-Verilog
• Design Compiler
• Low Power Systems
• Verilog
• SoC
• PLL
• LVS
• TetraMax
• Spyglass
• LEC
• First Encounter
• Project Management
• CDC
• Digital Design
• Verilog Ams
• Nc Verilog
• Design
• Low Power Design