Mihir Singh Email & Phone Number
ASIC Physical Design Engineer @ NVIDIA
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Mihir Singh Location
- San Diego, CA, US
Mihir Singh Work
- ASIC Physical Design Engineer @ (February 2023 - Present)
- Teaching Assistant @ UC San Diego (September 2022 - December 2022)
- Logic Design Implementation Intern @ (June 2022 - September 2022)
- Dining Room Busser @ UCSD Price Centre (March 2022 - June 2022)
- ASIC Intern @ (January 2021 - June 2021)
- CAD Intern @ (August 2020 - December 2020)
- Undergraduate Research Assistant @ (December 2019 - March 2020)
- Summer Intern @ Reserve Bank of India (RBI) (May 2019 - July 2019)
- Teaching Assistant @ (January 2019 - May 2019)
- Member, Payload Subdivision @ (March 2018 - March 2019)
- Intern @ (May 2018 - July 2018)
- Executive Committee Member, Events and Publicity @ (July 2017 - May 2018)
Mihir Singh Education
- UC San Diego Jacobs School of Engineering
Master of Science - MS (Electrical and Computer Engineering)
2021-2022 - Birla Institute of Technology and Science, Pilani
B.E. (Hons.) (Electrical and Electronics Engineering)
2016-2021 - Birla Institute of Technology and Science, Pilani
M.Sc. (Hons.) (Economics)
2016-2021
Mihir Singh Skills
- Atlas Silvaco
- Cadence Electronic Data Interchange (EDI)
- Cadence Genus
- Cadence Logic Equivalence Check
- Cadence Virtuoso
- Clock Domain Crossing
- Digital Circuit Design
- Digital Image Processing
- Financial Markets
- Fusion Compiler
- GNU Make
- Groovy
- Harmonica
- IC Compiler
- Indian Classical Music
- Jenkins
- LTSpice
- Leadership
- Logic Equivalence Check
- Lynx Design System
- Mentoring
- Meridian CDC
- National Service Scheme (NSS)
- Non-profit Volunteering
- Perl
- Perl Automation
- Physical Design
- Physical Design Implementation
- Project Management
- Python
- Python (Programming Language)
- Regression Analysis
- Shell Scripting
- Social Services
- Solido Crosscheck
- Static Timing Analysis
- Statistical Data Analysis
- Statistical Modeling
- Synopsys Design Compiler
- Synopsys Formality
- Synopsys Fusion Compiler
- Synopsys IC Compiler
- Synopsys IC Compiler II (ICC2)
- Synopsys tools
- TCL
- Tcl-Tk
- Teaching
- Time Series Analysis
- University Teaching
- VLSI CAD
- Violin
- YAML
Mihir Singh Summary
- Mihir Singh, based in San Diego, CA, US, is currently a ASIC Physical Design Engineer at NVIDIA. Mihir Singh brings experience from previous roles at UC San Diego, NVIDIA and UCSD Price Centre. Mihir Singh holds a 2021 - 2022 Master of Science - MS in Electrical and Computer Engineering @ UC San Diego Jacobs School of Engineering. With a robust skill set that includes Atlas Silvaco, Cadence Electronic Data Interchange (EDI), Cadence Genus, Cadence Logic Equivalence Check, Cadence Virtuoso and more. Mihir Singh has 2 emails and 1 mobile phone numbers on RocketReach.
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