Michael Wilk Email & Phone Number
SDG Front End Design Automation Engineer @ Intel Corporation
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Michael Wilk Location
- San Jose, CA, US
Michael Wilk Work
- 2016 -now SDG Front End Design Automation Engineer @
- 2015 -2016 Electrical Test Dev. Engineer (Data Handling Systems and Bus) @
- 2013 -2015 EE Grad Student @
- 2014 -2015 Software IP Intern @
- 2013 -2014 Electrical Engineering Intern @
- 2011 -2012 3rd Assistant Engineer @
Michael Wilk Education
- San Jose State University
Master of Science (MS) (Electrical and Electronics Engineering)
2012-2013 - California State University Maritime Academy
Bachelor of Science (BS) (Naval Architecture and Marine Engineering)
2007-2011
Michael Wilk Skills
- Verilog
- Electrical Engineering
- Electronics
- ASIC
- C
- Engineering
- VHDL
- LTSpice
- Microcontrollers
- Marine Engineering
- Matlab
- Analog Circuit Design
- C++
- FPGA
- Diesel
- Python
- Microsoft Office
- Maritime
- Hydraulics
- Mechanical Engineering
- Digital Circuit Design
- Logic Design
- Welding
- Preventive Maintenance
- Gas Turbines
- Diesel Engine
- Linux
- Power Generation
- Shipping
- Power Plants
- ASIC Design
- Digital Logic Design
- Printed Circuit Board Design and Implementation
- Electrical Troubleshooting
- FPGA prototyping
- Raspberry Pi
- Remote Desktop (VNC)
- WinSCP
- Java
- Field Programmable Gate Arrays Fpga
- Remote Desktop Vnc
- Field Programmable Gate Arrays
- Remote Desktop
Michael Wilk Summary
- Michael Wilk, based in San Jose, CA, US, is currently a SDG Front End Design Automation Engineer at Intel Corporation. Michael Wilk brings experience from previous roles at SSL (Space Systems Loral), SJSU, Altera and Wattminder. Michael Wilk holds a 2012 - 2013 Master of Science (MS) in Electrical and Electronics Engineering @ San Jose State University. With a robust skill set that includes Verilog, Electrical Engineering, Electronics, ASIC, C and more. Michael Wilk has 2 emails and 1 mobile phone numbers on RocketReach.
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