Michael Vasicek Email
Lead Chip Design Engineer @ Numascale AS
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Michael Vasicek Location
- Prague, Czechia
Michael Vasicek Work
- 2009 -now Lead Chip Design Engineer @
- 2007 -2008 Lead Chip Design Engineer @
- 1999 -2007 Principal Design Engineer @ Stargen
- 1998 -1999 Senior Design Engineer @
- 1993 -1998 Chip Design Engineer @
Michael Vasicek Education
- Vysoká škola finanční a správní - Praha
Master's degree (Informatics)
2009-2011 - Tufts University
BSEE (Electrical Engineering)
1989-1993
Michael Vasicek Skills
- ASIC
- FPGA
- SystemVerilog
- Verilog
- UVM
- RTL design
- Chip Architecture
- PCIe
- HyperTransport
- Cache Coherency
- Synopsys tools
- C++
- Perl
- SCI
- Logic Design
- Logic Synthesis
- RTL verification
- Hardware
- Integrated Circuit Design
- Debugging
- Testing
- Simulation
- Software Engineering
- IC
- Application Specific Integrated Circuits
- Field Programmable Gate Arrays
- Upi
- Ultrapath Interconnect
Michael Vasicek Summary
- Michael Vasicek, based in Prague, Czechia, is currently a Lead Chip Design Engineer at NumaScale. Michael Vasicek brings experience from previous roles at Dolphin Interconnect Solutions, Stargen, Intel and Digital Equipment Corporation. Michael Vasicek holds a 2009 - 2011 Master's degree in Informatics @ Vysoká škola finanční a správní - Praha. With a robust skill set that includes ASIC, FPGA, SystemVerilog, Verilog, UVM and more. Michael Vasicek has 2 emails on RocketReach.
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