FPGA Architect and Sr. FPGA Designer @ (November 2009 - January 2016)
Senior ASIC Engineer @ (December 2005 - June 2009)
Senior Hardware Design Engineer @ (December 2003 - December 2005)
Hardware Engineer Lead @ CALSYS - A Start-up to develop comprehensive RADAR-based control systems for air (November 2001 - December 2003)
Hardware Design Engineer @ Kerenix Networks - A Start-up to develop data aware optical networks for terabit (January 2001 - November 2001)
Hardware Design Engineer @ (August 1999 - January 2001)
Michael Gutman Education
Tel Aviv University
B.Sc (Electrical and Electronics Engineering)
Michael Gutman Skills
Embedded Software
Fiber Optics
Hardware Architecture
C/C++
Signal Integrity
Linux
Field Programmable Gate Arrays Fpga
Systems Engineering
Debugging
Perl
RTL design
Matlab
Microprocessors
Processors
PCB design
ASIC
Telecommunications
Electronics
IP
Digital Design
Verilog
Integrated Circuit Design
Xilinx
TCL
Hardware Design
Ethernet
Embedded Linux
Embedded Systems
FPGA
SoC
RTL coding
VHDL
ModelSim
Simulation
C++
Timing Closure
Carrier Ethernet
Altera
SystemVerilog
Simulations
Firmware
Quartus
Static Timing Analysis
Digital Signal Processors
Device Drivers
Orcad
Hardware
Field Programmable Gate Arrays
Michael Gutman Summary
Michael Gutman, based in Aurora, ON, CA, is currently a Sr. ASIC Designer at Ciena. Michael Gutman brings experience from previous roles at Mavenir, iS5 Communications Inc., Istuary Innovation Group and Christie Digital Systems. Michael Gutman holds a B.Sc in Electrical and Electronics Engineering @ Tel Aviv University. With a robust skill set that includes Embedded Software, Fiber Optics, Hardware Architecture, C/C++, Signal Integrity and more. Michael Gutman has 4 emails and 1 mobile phone numbers on RocketReach.
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