Melissa Phan Email & Phone Number
Layout Engineer @ Qorvo, Inc.
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Melissa Phan Location
- San Jose, CA, US
Melissa Phan Work
- Layout Engineer @ (November 2022 - Present)
- Layout Design Engineer @ (May 2022 - March 2023)
- Senior Layout Designer @ (December 2021 - May 2022)
- Analog Mixed-Signal Mask Designer @ (January 2010 - January 2017)
- Mask Designer Specialist @ (January 1999 - January 2010)
- Senior Mask Designer @ C-Cube Microsystems (January 1996 - January 2003)
- Senior Layout Designer @ (July 1986 - January 1996)
Melissa Phan Education
- B.A. in Literarure, Saigon University 1969-1973
Bachelor's degree (Drafting and Design Technology/Technician, General)
1981-1983 - CMOS Design Training center
Certificate (Mask layout Designer)
- Mask Design Training Center
Certificater (CMOS layout Designer)
Melissa Phan Skills
- Cadence
- Cadence Virtuoso
- Cadence Virtuoso Layout Editor
- Debugging
- Physical Design
- Semiconductors
- Very-Large-Scale Integration (VLSI)
Melissa Phan Summary
- Melissa Phan, based in San Jose, CA, US, is currently a Layout Engineer at Qorvo, Inc.. Melissa Phan brings experience from previous roles at CrossBar Inc., SiTime, Oracle | TOA Technologies and Sun Microsystems. Melissa Phan holds a 1981 - 1983 Bachelor's degree in Drafting and Design Technology/Technician, General @ B.A. in Literarure, Saigon University 1969-1973. With a robust skill set that includes Cadence, Cadence Virtuoso, Cadence Virtuoso Layout Editor, Debugging, Physical Design and more. Melissa Phan has 1 emails and 2 mobile phone numbers on RocketReach.
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