Mei-Chin Chen's Location
West Lafayette, IN, US
Mei-Chin Chen's Work
- SoC Design Engineer @ Intel Capital
- Emerging memory design engineer @ Micron Technology
- Research Assistant @ Purdue University
- Research Assistant @ National Chiao Tung University
Mei-Chin Chen's Education
- Purdue University
Doctor of Philosophy - PhD (Electrical and Computer Engineering)
2013 - 2020 - National Chiao Tung University
Bachelor's degree (Electrophysics)
2008 - 2012
Mei-Chin Chen's Skills
- Matlab
- Nanotechnology
- Physics
- Spintronics
- Simulations
- Microsoft Office
- LaTeX
- CMOS
- Semiconductor Device
- Mram
Mei-Chin Chen's Summary
Mei-Chin Chen, based in West Lafayette, IN, US, is currently a SoC Design Engineer at Intel Corporation, bringing experience from previous roles at Micron Technology, Purdue University and National Chiao Tung Universerty. Mei-Chin Chen holds a 2013 - 2020 Doctor of Philosophy - PhD in Electrical and Computer Engineering @ Purdue University. With a robust skill set that includes Matlab, Nanotechnology, Physics, Spintronics, Simulations and more, Mei-Chin Chen contributes valuable insights to the industry. Mei-Chin Chen has 2 emails on RocketReach.
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