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Mei bin Location
Thousand Oaks, CA, US
Mei bin Work
Digital Verification Engineer @ (January 2024 - Present)
Staff Engineer, Digital Verification @ (October 2020 - December 2023)
Design Verification Engineer @ (March 2016 - September 2020)
Verification Engineer @ (November 2013 - February 2016)
Software Developer @ CACI SystemWare (June 2010 - November 2013)
ASIC verification engineer @ (January 2002 - January 2010)
hardware diagnostic engineer @ (January 1996 - January 2002)
Mei bin Education
Caltech
PH.D. (Physics)
1990-1996
Tsinghua University
Physics
Mei bin Skills
ASIC
C
C++
ClearCase
Debugging
Embedded Systems
FPGA
Hardware
IC
Perl
Semiconductors
SoC
Software Development
Testing
Verilog
Fortran
Laboratory
Physics
Memory
PowerPoint
Mei
Ahead Of Schedule
Top Performer
Source
Shell
Signal
Linux
Methodology
Adobe Contribute
Pin
Gate Level Simulation
Windows
Assembly Language
Configurations
STAR
Functional Verification
Interfaces
Cost
Testers
Troubleshooting
System
Electronics
Schedules
Home
Cell
Defects
Analog
Asics
Diagnostics
Tests
Logic Gates
Radio Access Network
Tight Deadlines
Quality Assurance
Software
Engineering
Design Specifications
SPIN
Behavioral Modeling
Visual Basic
Microsoft Word
Hardware Verification
Mixed
APIs
Diligent
Microsoft Excel
Serial
Mixed Signal
OOP
Bus
Scripting
Shoot
SystemVerilog
Management
Simulations
Design
Product Development
Block Diagrams
SystemC
Conceptual Modeling
Unix
Voltage
Architecture
Test Development
Beijing
Mei bin Summary
Mei bin, based in Thousand Oaks, CA, US, is currently a Digital Verification Engineer at Monolithic Power Systems, Inc.. Mei bin brings experience from previous roles at Luminous Computing, Eta Compute, Teradyne and CACI SystemWare. Mei bin holds a 1990 - 1996 PH.D. in Physics @ Caltech. With a robust skill set that includes ASIC, C, C++, ClearCase, Debugging and more. Mei bin has 4 emails and 1 mobile phone numbers on RocketReach.
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