Mayank Raj Location

San Jose, CA, US

Mayank Raj Work

  • 2015 - now  Invited Reviewer @ IEEE Journals
  • 2020 - 2022 Senior Design Manager @ Xilinx
  • 2018 - 2020 Senior Staff Design Engineer @ Xilinx
  • 2014 - 2020 Staff Design Engineer @ Xilinx
  • 2009 - 2014 Phd Candidate @ Caltech
  • 2012 - 2012 Analog and Mixed Signal Intern @ Xilinx

Mayank Raj Education

  • Caltech

    Doctor of Philosophy (PhD) (Electrical and Electronics Engineering)

    2009 - 2014
  • Caltech

    Master of Science (M.S.) (Electrical and Electronics Engineering)

    2008 - 2009
  • Indian Institute of Technology, Kanpur

    Bachelor's Degree (Electrical and Electronics Engineering)

    2004 - 2008

Mayank Raj Skills

  • Injection Locked Circuits
  • PLL
  • Clock Distribution
  • VCSEL
  • Transmitter Equalization
  • Mixed-Signal IC Design
  • On Chip Noise Measurement
  • Matlab
  • Simulink
  • Cadence

Mayank Raj Summary

Mayank Raj, based in San Jose, CA, US, is currently a AMD Fellow, Manager Silicon Design at AMD. Mayank Raj brings experience from previous roles at AMD, IEEE Custom Integrated Circuits Conference, IEEE Journals and Xilinx. Mayank Raj holds a 2009 - 2014 Doctor of Philosophy (PhD) in Electrical and Electronics Engineering @ Caltech. With a robust skill set that includes Injection Locked Circuits, PLL, Clock Distribution, VCSEL, Transmitter Equalization and more. Mayank Raj has 2 emails and 1 mobile phone numbers on RocketReach.

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