Maulesh Patel Email & Phone Number
Senior Design Manager and Technical Lead, Graphics ASIC Design at AMD @ AMD
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Maulesh Patel Location
- San Diego, CA, US
Maulesh Patel Work
- 2020 -now Senior Design Manager and Technical Lead, Graphics ASIC Design at AMD @
- 2018 -2020 Technical Lead, Graphics ASIC Design @
- 2004 -2018 Senior Staff ASIC Design Engineer @
- 2004 -2004 Digital Design Engineer @
Maulesh Patel Education
- California State University - Sacramento
Master of Science (Electronics Engineering)
- Nirma Institute Of Technology
Bachelor of Science (Electronics Engineering)
Maulesh Patel Skills
- ASIC
- Integrated Circuit Design
- RTL coding
- Hardware Architecture
- Emulation
- CMOS
- Verilog
- Physical Design
- RTL design
- SoC
- TCL
Maulesh Patel Summary
- Maulesh Patel, based in San Diego, CA, US, is currently a Senior Design Manager and Technical Lead, Graphics ASIC Design at AMD at AMD. Maulesh Patel brings experience from previous roles at Intel Corporation, Qualcomm Incorporation and Hewlett-Packard. Maulesh Patel holds a Master of Science in Electronics Engineering @ California State University - Sacramento. With a robust skill set that includes ASIC, Integrated Circuit Design, RTL coding, Hardware Architecture, Emulation and more. Maulesh Patel has 3 emails and 1 mobile phone numbers on RocketReach.
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