Matthew Yap Email
Associate Director @ Microchip Technology Inc.
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Matthew Yap Location
- United States
Matthew Yap Work
- Associate Director @ (September 2025 - Present)
- Sr. Manager, Design Engineering @ (November 2024 - September 2025)
- Sr. Manager - Design Engineering @ (June 2019 - November 2024)
- Manager, Design Implementation @ (May 2018 - May 2019)
- Design Engineering Manager @ (November 2016 - April 2018)
- ASIC Physical Design, Manager @ Altera (March 2010 - October 2016)
- Supervising Staff Engineer. @ Altera (July 2006 - February 2010)
- Senior Engineer @ Altera (May 2001 - June 2006)
Matthew Yap Education
- Universiti Teknologi Malaysia
Bachelor of Engineering (B.Eng.) (Electronic and Telecommunication)
1997-2001
Matthew Yap Skills
- Management
- Design
- Physical Design
- ASIC
- Illustrator
- Strategic Planning
- Pre and Post Silicon Eco
- Formal Equivalence Verification
- Signal Integrity
- Floorplanning
- Debugging
- Physical Verification
- Logic Synthesis
- RTL design
- Timing
- Auto Place and Route Apr
- Application Specific Integrated Circuits Asic
- Power Grid Planning
- Timing Budgeting
- FPGA
- Floorplanning Dp
- DRC
- Static Timing Analysis
- Clock Tree Synthesis
- Application Specific Integrated Circuits
- Auto Place and Route
Matthew Yap Summary
- Matthew Yap, based in United States, is currently a Associate Director at Microchip Technology Inc.. Matthew Yap brings experience from previous roles at Microchip Technology Inc., Microsemi Corporation and Intel Corporation. Matthew Yap holds a 1997 - 2001 Bachelor of Engineering (B.Eng.) in Electronic and Telecommunication @ Universiti Teknologi Malaysia. With a robust skill set that includes Management, Design, Physical Design, ASIC, Illustrator and more. Matthew Yap has 3 emails on RocketReach.
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