Matthew Staller Email & Phone Number
Principle IC layout Engineer @ Celero
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Matthew Staller Location
- Austin, TX, US
Matthew Staller Work
- 2026 -now Principle IC layout Engineer @
- 2025 -2026 Senior IC layout designer @ Apple
- 2016 -2025 Senior IC Layout Designer @
- 2013 -2015 Senior IC Layout Designer @ Cirrus Logic
- 2006 -2013 Layout Design Engineer @ Silicon Laboratories
Matthew Staller Education
- Austin Community College 2002-2003
Matthew Staller Skills
- Cadence Virtuoso
- Signal Integrity
- Floorplanning
- Analog Circuit Design
- Debugging
- Microprocessors
- Analog
- ASIC
- Verilog
- PLL
- Cadence
- Mixed Signal
- Embedded Systems
- CMOS
- LVS
- SoC
- DRC
- Semiconductors
- Physical Design
- Low Power Design
- IC
Matthew Staller Summary
- Matthew Staller, based in Austin, TX, US, is currently a Principle IC layout Engineer at Celero. Matthew Staller brings experience from previous roles at Apple, Maxim Integrated, Cirrus Logic and Silicon Laboratories. Matthew Staller holds a 2002 - 2003 Austin Community College. With a robust skill set that includes Cadence Virtuoso, Signal Integrity, Floorplanning, Analog Circuit Design, Debugging and more. Matthew Staller has 3 emails and 2 mobile phone numbers on RocketReach.
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