Matthew Karaffa Email & Phone Number
Principal Electrical Engineer - HDL @ ANDURIL
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Matthew Karaffa Location
- Fullerton, CA, US
Matthew Karaffa Work
- Principal Electrical Engineer - HDL @ (October 2025 - Present)
- Digital ASIC Design and Verification Engineer @ (November 2017 - October 2025)
- Senior Digital Design Engineer @ (February 2005 - January 2017)
- Engineer and Scientist I @ (April 2003 - February 2005)
- Engineer @ QLogic Corporation (January 2005 - January 2005)
- Circuit Design Engineer @ Creative Integrated Systems (June 2000 - April 2003)
Matthew Karaffa Education
- UC Irvine
BS (Electrical Engineering and Computer Engineering)
1997-2002 - Esperanza High School
High School
1995-1997 - Amelia High School 1993-1997
Matthew Karaffa Skills
- ASIC
- Application-Specific Integrated Circuits (ASIC)
- Circuit Design
- Debugging
- Ethernet
- Functional Verification
- Linux
- Microsoft Office
- Perl
- RTL Design
- RTL Verification
- System on a Chip (SoC)
- SystemVerilog
- Universal Verification Methodology (UVM)
- VHDL
- Verilog
- Very-Large-Scale Integration (VLSI)
Matthew Karaffa Summary
- Matthew Karaffa, based in Fullerton, CA, US, is currently a Principal Electrical Engineer - HDL at Anduril Industries. Matthew Karaffa brings experience from previous roles at Boeing, Marvell and QLogic Corporation. Matthew Karaffa holds a 1997 - 2002 BS in Electrical Engineering and Computer Engineering @ UC Irvine. With a robust skill set that includes ASIC, Application-Specific Integrated Circuits (ASIC), Circuit Design, Debugging, Ethernet and more. Matthew Karaffa has 5 emails and 1 mobile phone numbers on RocketReach.
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