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Matthew Eckl Location
Austin, TX, US
Matthew Eckl Work
PMTS System Design Engineering @ (January 2026 - Present)
Technical Lead FPGA Performance Validation Engineer @ (January 2025 - December 2025)
Senior Staff FPGA Performance Validation and Optimization Engineer @ (August 2018 - January 2025)
Senior Staff Server Processor Benchmarking Engineer @ (July 2013 - August 2018)
System X Performance Engineer @ (August 2004 - June 2013)
IntelliStation Graphical Workstation Performance @ (July 1999 - August 2004)
Company Representative and Benchmark Lead @ (January 2000 - June 2013)
Matthew Eckl Education
Georgia Institute of Technology
BS (Computer Engineering)
Matthew Eckl Skills
Architecture
Architectures
Bash
Benchmarking
C
Cluster
Competitive Analysis
Computer Architecture
Computer Hardware
Debugging
Energy Efficiency
Flash Memory
Hardware
Hardware Architecture
High Availability
High Performance Computing
Integration
Leadership
Linux
Networking
Operating Systems
Performance Tuning
Red Hat Linux
Server Architecture
Servers
Shell Scripting
Silicon Validation
Software Engineering
Storage
Storage Area Networks
System Architecture
Unix
Virtualization
X86
Business Analysis
Social Media
Sales
Manufacturing
PowerPoint
Management
Matthew Eckl Summary
Matthew Eckl, based in Austin, TX, US, is currently a PMTS System Design Engineering at AMD. Matthew Eckl brings experience from previous roles at Altera, Intel Corporation, Qualcomm and IBM. Matthew Eckl holds a BS in Computer Engineering @ Georgia Institute of Technology. With a robust skill set that includes Architecture, Architectures, Bash, Benchmarking, C and more. Matthew Eckl has 3 emails and 2 mobile phone numbers on RocketReach.
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