Matt Mellor's Location
Laveen, Arizona, United States
Matt Mellor's Work
- SOC Debug Engineer @ Intel Corporation
- System Engineering Manager @ Intel Corporation
- Software Development Engineer @ Intel Corporation
- Technical Project Manager @ Intel Corporation
- Electrical and Functional Validation Engineer @ Intel Corporation
- Software Application Engineer @ Intel Corporation
- Lead Validaiton Engineer and Manager @ Intel Corporation
- Senior Media Validation Engineer @ Intel Corporation
- Validation \Software Engineer @ Intel Corporation
- Information Technology Staff @ Office of the Governor - California
Matt Mellor's Education
- Ira A. Fulton Schools of Engineering at Arizona State University2010 - 2014
- California State University - Sacramento
Bachelor of Engineering
1993 - 2000 - California State University - Sacramento
Bachelor of Engineering (Computer Engineering)
1994 - 2000
- Gainesville State College1988 - 1992
- Florida College1990 - 1990
Matt Mellor's Skills
- Embedded Systems
- PCIe
- SoC
- Debugging
- Processors
- Hardware Architecture
- FPGA
- IC
- Firmware
- Embedded Software
Matt Mellor's Summary
Matt Mellor, based in Laveen, Arizona, United States, is currently a SOC Debug Engineer at Intel Corporation, bringing experience from previous roles at Intel Corporation. Matt Mellor holds a 2010 - 2014 Ira A. Fulton Schools of Engineering at Arizona State University. With a robust skill set that includes Embedded Systems, PCIe, SoC, Debugging, Processors and more, Matt Mellor contributes valuable insights to the industry. Matt Mellor has 2 emails and 2 mobile phone numbers on RocketReach.
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