Marko Olujić Email
Design Verification Engineer @ Verilab
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Marko Olujić Location
- Berlin, DE
Marko Olujić Work
- Design Verification Engineer @ (April 2016 - Present)
- Senior Verification Engineer @ (February 2009 - March 2016)
Marko Olujić Education
- Faculty of Technical Sciences in Novi Sad
Master of Science (Electrical and Computer Engineering)
2001-2007
Marko Olujić Skills
- AMBA AHB
- ASIC
- C
- C++
- Debugging
- EDA
- Embedded Systems
- FPGA
- Functional Verification
- IC
- Integrated Circuit Design
- Linux
- Microcontrollers
- ModelSim
- NCSim
- Open Verification Methodology
- PCIe
- RTL Verification
- RTL coding
- RTL design
- Semiconductors
- Simulations
- SoC
- Specman
- SystemVerilog
- UVM
- VHDL
- VLSI
- VMM
- Verilog
- Cadence Virtuoso
- Formal Verification
Marko Olujić Summary
- Marko Olujić, based in Berlin, DE, is currently a Design Verification Engineer at Verilab. Marko Olujić brings experience from previous roles at HDL Design House. Marko Olujić holds a 2001 - 2007 Master of Science in Electrical and Computer Engineering @ Faculty of Technical Sciences in Novi Sad. With a robust skill set that includes AMBA AHB, ASIC, C, C++, Debugging and more. Marko Olujić has 2 emails on RocketReach.
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