Mark Ruiter Email
Technical Leader @ Teledyne DALSA
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Mark Ruiter Location
- Enschede, OV, NL
Mark Ruiter Work
- Technical Leader @ (January 2022 - Present)
- Senior Analog Design Engineer @ (January 2017 - October 2022)
- Analog Design Engineer @ (July 2013 - December 2016)
- Analog Design Engineer @ Axiom IC (February 2010 - July 2013)
Mark Ruiter Education
- University of Twente
Master (Electrical Engineering)
2006-2010 - University of Twente
Bachelor (Elektrotechniek)
2003-2006 - University of Groningen
Propedeuse (Kunstmatige Intelligentie)
2002-2003
Mark Ruiter Skills
- ADCs
- ASIC
- Analog
- Behavioral models
- Bolometer ROIC architect
- C++
- CMOS
- CMOS mixed signal circuit design
- Cadence Virtuoso
- DACs
- Documentation
- Engineering
- Gestructureerd en detailgericht werken
- Image sensors
- Integrated Circuit Design
- Java
- LaTeX
- Layout
- Matlab
- Microelectronics
- Modellering
- Numerical Analysis
- Object Pascal
- Research
- SAR ADCs
- SKILL
- Sigma Delta ADCs
- Simuleren
- Simulink
- Spectre
- Uncooled Infrared Imaging
- Verification
- Verilog-AMS
Mark Ruiter Summary
- Mark Ruiter, based in Enschede, OV, NL, is currently a Technical Leader at Teledyne DALSA. Mark Ruiter brings experience from previous roles at Teledyne DALSA and Axiom IC. Mark Ruiter holds a 2006 - 2010 Master in Electrical Engineering @ University of Twente. With a robust skill set that includes ADCs, ASIC, Analog, Behavioral models, Bolometer ROIC architect and more. Mark Ruiter has 1 emails on RocketReach.
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