Mark Jurenka Location

Los Angeles, CA, US

Mark Jurenka Work

Mark Jurenka Education

  • Boise State University

    Master's of Science In Computer Engineering (Computer Engineering)

    2006 - 2010
  • Boise State University

    MSCE (Computer Engineering)

    2002 - 2009
  • Montana State University-Bozeman

    B.S. E.E. (Digital Hardware)

    1978 - 1983
  • Montana State University-Northern

    EET (Electronics)

    1976 - 1978

Mark Jurenka Skills

  • Proposal Writing
  • Debugging
  • Firmware
  • Embedded Systems
  • FPGA
  • VHDL
  • Hardware Architecture
  • ASIC
  • Semiconductors
  • Circuit Design

Mark Jurenka Summary

Mark Jurenka, based in Los Angeles, CA, US, is currently a Staff Hardware Design Engineer at PROTEOR USA. Mark Jurenka brings experience from previous roles at Crane Aerospace & Electronics, Raytheon Space and Airborne Systems, WET (Design) and Optical Zonu Corp.. Mark Jurenka holds a 2006 - 2010 Master's of Science In Computer Engineering in Computer Engineering @ Boise State University. With a robust skill set that includes Proposal Writing, Debugging, Firmware, Embedded Systems, FPGA and more. Mark Jurenka has 2 emails and 1 mobile phone numbers on RocketReach.

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