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Mark Johnstone Location
Austin, TX, US
Mark Johnstone Work
1996 -now Technical Director of EDA @
2007 -2010 Chief Technologist, Tools and Methodology Development @
1997 -2010 EDA and CAD Engineer @
2005 -2008 Adjunct Professor of Electrical Engineering @
1999 -2007 Adjunct Professor of Computer Science @
1996 -2004 EDA and CAD Engineer @
1990 -1996 Ph.D. Student @
1987 -1990 Software Engineer @
1985 -1986 Summer Intern @
Mark Johnstone Education
The University of Texas at Austin
Ph.D. (Computer Science)
1990-1997
University of California, Davis
BS (Computer Science)
1983-1987
Mark Johnstone Skills
Physical Design
Static Timing Analysis
EDA
SoC
ASIC
Verilog
Semiconductors
Microprocessors
Low-power Design
Logic Design
TCL
Circuit Design
Hardware Architecture
C++
Object-oriented Software
High-Level Synthesis
SystemC
IEEE 754-2008
Java
Scheme
Memory Management
Compilers
Common Lisp
Artificial Intelligence
Expert Systems
Neural Networks
VLSI
RTL design
Debugging
Processors
Application-Specific Integrated Circuits (ASIC)
System on a Chip (SoC)
PowerPoint
Hedge Fund Diligence
System On A Chip Soc
Teaching
High Level Synthesis
Business Development
Strategic Planning
Application Specific Integrated Circuits Asic
Management
Performance Analysis
Science
Research
Low Power Design
Object Oriented Software
Integration
Ieee 754 2008
Application Specific Integrated Circuits
System on a Chip
Mark Johnstone Summary
Mark Johnstone, based in Austin, TX, US, is currently a Technical Director of EDA at NXP Semiconductors. Mark Johnstone brings experience from previous roles at Freescale Semiconductor and University of Texas at Austin. Mark Johnstone holds a 1990 - 1997 Ph.D. in Computer Science @ The University of Texas at Austin. With a robust skill set that includes Physical Design, Static Timing Analysis, EDA, SoC, ASIC and more. Mark Johnstone has 2 emails and 4 mobile phone numbers on RocketReach.
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