Marc-André Parent Email & Phone Number
Hardware Design Engineer @ EERS Global Technologies Inc.
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Marc-André Parent Location
- Saint-Basile-le-Grand, QC, CA
Marc-André Parent Work
- Hardware Design Engineer @ (April 2019 - Present)
- Concepteur matériel et micrologiciel @ (July 2018 - March 2019)
- Concepteur matériel et micrologiciel @ (April 2017 - March 2019)
- Ingénieur système pour le contrôle des portes de train @ (August 2015 - April 2017)
- Concepteur matériel @ (January 2013 - August 2015)
- Concepteur matériel et de logiciel embarqué @ (December 2010 - January 2013)
- Responsable du département électrique @ Club étudiant CAPRA (September 2007 - August 2010)
- Assistant du responsable du déploiement des systèmes de transports intelligents (Stage) @ (May 2009 - August 2009)
- Opérateur aux services des technologies de l’information @ (September 2005 - February 2009)
- Concepteur de logiciel embarqué (Stage) @ (May 2008 - August 2008)
- Technicien au service informatique (Stage) @ Le club de hockey Canadiens (January 2007 - April 2007)
Marc-André Parent Education
- École de technologie supérieure
BAC (Génie Électrique)
2006-2010 - College Ahuntsic
DEC (Technologie du génie électrique)
2003-2006
Marc-André Parent Skills
- FPGA
- CPLD
- Microcontrollers
- JTAG
- PS/2
- I2C
- SPI
- RS232
- USB
- EDID
- DMA
- MDIO
- PCB design
- Altera Quartus
- Xilinx ISE
- Tortoise SVN
- Altium Designer
- OrCAD Capture CIS
- Atmel AVR
- Code Composer Studio
- C/C++
- VHDL
- Computer Hardware
- Electronics
- Electronic Hardware
- Electronics Hardware Design
- Low Level Programming
- Low Level Design
- Windows
- Ubuntu
- Debian
- RTOS
- UML
- Hardware Architecture
- Visual C++
- Xilinx
- Board Layout
- Software Design
- Robotics
- Schematic Capture
- Software Engineering
- Programming
- PCIe
- Simulations
- C
- Digital Signal Processors
- Object Oriented Design
- Device Drivers
- Orcad
- Debugging
- Cadence
- Software
- Design
Marc-André Parent Summary
- Marc-André Parent, based in Saint-Basile-le-Grand, QC, CA, is currently a Hardware Design Engineer at EERS. Marc-André Parent brings experience from previous roles at Lyft, 8D Technologies, Bombardier Transportation and SERVO-ROBOT Inc.. Marc-André Parent holds a 2006 - 2010 BAC in Génie Électrique @ École de technologie supérieure. With a robust skill set that includes FPGA, CPLD, Microcontrollers, JTAG, PS/2 and more. Marc-André Parent has 1 emails and 3 mobile phone numbers on RocketReach.
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