Manoj Pandya's Location
Portland, OR, US
Manoj Pandya's Work
- Sr. Asic Design Engineer @ Intel Corporation
- Tech Leader , Product Development @ PMC-Sierra is now Microsemi
- Principal Design Engineer @ Cypress Semiconductor Corporation
- Leader, Product Development @ PMC-Sierra is now Microsemi
- Design Engineer @ Sharp Home USA
Manoj Pandya's Education
- California State University-Northridge
Master of Science (MS) (EE)
1991 - 1994 - High School
- Sardar Patel University
BS (Electrical and Electronics Engineering)
Manoj Pandya's Skills
- Development
- Logic Synthesis
- Functional Verification
- RTL design
- DFT
- See 2+See Less
- ASIC
- Verilog
- Ethernet
- FPGA
Manoj Pandya's Summary
Manoj Pandya, based in Portland, OR, US, is currently a Sr. Asic Design Engineer at Intel, bringing experience from previous roles at PMC-Sierra, Cypress Semiconductor and Sharp Microelectronics. Manoj Pandya holds a 1991 - 1994 Master of Science (MS) in EE @ California State University-Northridge. With a robust skill set that includes Development, Logic Synthesis, Functional Verification, RTL design, DFT and more, Manoj Pandya contributes valuable insights to the industry. Manoj Pandya has 2 emails on RocketReach.
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