Manish Tanwar Email & Phone Number
PMTS Silicon Design Engineer @ AMD
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Manish Tanwar Location
- Austin, TX, US
Manish Tanwar Work
- PMTS Silicon Design Engineer @ (August 2026 - Present)
- DV Lead @ (December 2020 - August 2026)
- Senior Technical Lead @ (November 2015 - December 2020)
- Senior Staff Engineer @ (November 2013 - November 2015)
- ASIC Verification engineer III @ (February 2013 - November 2013)
- ASIC DV Engineer @ (May 2012 - February 2013)
- Project Lead @ (January 2012 - May 2012)
- Technical Lead @ Samsung india software operations (August 2011 - January 2012)
- Principal Engineer @ SMSC (June 2010 - July 2011)
- Senior Member of Technical Staff @ (November 2006 - May 2010)
- Design Engineer-II @ (December 2003 - November 2006)
- Telecom Engineer @ Birla technical Services (March 2002 - November 2003)
Manish Tanwar Education
- Centre for Development of Advanced Computing (C-DAC)
PG Diploma in VLSI Design (Microelectronics & VLSI Design)
2001-2002 - Maharshi Dayanand University Rohtak
B.E (Electronics & Telecommunication)
1997-2001
Manish Tanwar Skills
- SystemVerilog
- ARM
- E/Specman
- UVM
- ASIC
- SoC
- Asic/Soc Verification
- Verilog
- System C
- C
- Debugging
- Erm
- Arm Coresight Debug System
- Functional Verification
- OVM
Manish Tanwar Summary
- Manish Tanwar, based in Austin, TX, US, is currently a PMTS Silicon Design Engineer at AMD. Manish Tanwar brings experience from previous roles at AMD, Altran, WD, a Western Digital company and SmartPlay Technologies - An Aricent Company. Manish Tanwar holds a 2001 - 2002 PG Diploma in VLSI Design in Microelectronics & VLSI Design @ Centre for Development of Advanced Computing (C-DAC). With a robust skill set that includes SystemVerilog, ARM, E/Specman, UVM, ASIC and more. Manish Tanwar has 2 emails and 2 mobile phone numbers on RocketReach.
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