M. Alam Email & Phone Number
ASIC Timing Engineer @ Cisco
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M. Alam Location
- Allentown, PA, US
M. Alam Work
- 2025 -now ASIC Timing Engineer @
- 2020 -2025 SoC Design Engineer @
- 2014 -2020 Principal ASIC Design Engineer @
- 2007 -2014 Principal ASIC Design Engineer @
- 2003 -2007 Senior ASIC Design Engineer @ Lucent Technologies / Agere Systems
- 2000 -2003 Digital Design Engineer @ Lucent Technologies / Agere Systems
- 1995 -2000 Graduate Research Assistant @
- 1992 -1995 Lecturer, Electrical and Electronic Engineering @
M. Alam Education
- University of Dayton
Doctor of Philosophy (Ph.D.) (Optical Communications Engineering)
1997-2000 - University of Dayton
Master’s Degree (Optical Communications Engineering)
1995-1997 - Bangladesh University of Engineering and Technology
Bachelor’s Degree (Electrical & Electronic Engineering)
1987-1992
M. Alam Skills
- ASIC
- RTL design
- Integrated Circuit Design
- SoC
- IC
- Semiconductors
- Simulations
- Integrated Circuits (IC)
- Front-end Development
- VLSI
- System on a Chip (SoC)
- Verilog
- C
- C++
- VHDL
- Static Timing Analysis
- SystemVerilog
- Formal Verification
- Timing Closure
- Logic Synthesis
- Low-power Design
- Primetime
- Digital Design
- Signal Integrity
- Solid-State Drive (SSD)
- Computer Architecture
- Optical Communications
- Low Power Design
- Teaching
- Front End Development
- Engineering
- Digital Marketing
- Design
- Microsoft Office
M. Alam Summary
- M. Alam, based in Allentown, PA, US, is currently a ASIC Timing Engineer at Cisco. M. Alam brings experience from previous roles at Intel Corporation, Broadcom Inc., LSI Corporation and Lucent Technologies / Agere Systems. M. Alam holds a 1997 - 2000 Doctor of Philosophy (Ph.D.) in Optical Communications Engineering @ University of Dayton. With a robust skill set that includes ASIC, RTL design, Integrated Circuit Design, SoC, IC and more. M. Alam has 1 emails on RocketReach.
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