2007 -2010 Head of Departement SDD and Board Design @
2010 -2012 Fellow and Examiner SGA @ CATRENE & AENEAS - Innovation/Research in Europe on Nanoelectronics
2005 -2006 Project Manager IPSEOX (startup) @
2004 -2005 Senior Designer ASIC-DFT @
2003 -2004 Senior Designer FPGA and Board @
2002 -2003 Senior Designer ASIC @
2001 -2002 Senior Designer ASIC @ DSPfactory
2001 -2001 PhD studentship @
1998 -2000 Junior ASIC Designer @
Luigi Grasso Education
Ecole polytechnique fédérale de Lausanne
(Microprocessors Architecture)
2000-2001
Technische Universität München
(Electronics)
1997-1998
University of Strathclyde
(Electronics)
1996-1997
Università di Pisa
MS (microelectronics)
1989-1996
Luigi Grasso Skills
ARM
International Project Management
FPGA
ASIC
High Performance Computing
Server Architecture
Intel
Mixed Analog-Digital PCB Design
Offshore Project Management
ASIC Design
FPGA Design
EU project financing; Catrene, FP7
Project Management
Cloud Computing
Quality Management
Innovation Management
Global Cross-Functional Team Leadership
Digital Electronics
Electronics Manufacturing
Integration Testing
Integrated Circuit Design
Simulations
SoC
System Architecture
Perl
VHDL
Digital Signal Processors
Mixed Analog Digital Pcb Design
Janitorial
Foodservice
Eu Project Financing
Healthcare
Catrene
Global Cross Functional Team Leadership
Hospitality
Fp7
Luigi Grasso Summary
Luigi Grasso, based in Barcelona, CT, ES, is currently a OCP HW Architect Lead at Semidynamics. Luigi Grasso brings experience from previous roles at MkMyBo, UP ! Bridge the gap, AAEON Europe and Commissariat a l'Energie Atomique et aux Energies Alternatives. Luigi Grasso holds a 2000 - 2001 Ecole polytechnique fédérale de Lausanne. With a robust skill set that includes ARM, International Project Management, FPGA, ASIC, High Performance Computing and more. Luigi Grasso has 2 emails on RocketReach.
Looking for a different Luigi Grasso?
Find contact details for 700 million professionals.