MTS Design Engineer @ (April 2012 - December 2012)
Physical Verification Consultant @ (March 2010 - April 2012)
Principal Services AE @ (January 2002 - June 2009)
Services AE @ (December 1999 - December 2001)
Physical Verification DRC and LVS and EXT @ (January 1992 - January 1999)
Lorraine Bell Education
Pacific Lutheran University
BS (Computer Science)
1984-1987
Lorraine Bell Skills
C
C++
CMOS
Cadence
Cadence Virtuoso
DRC
EDA
Hercules
Integrated Circuit Design
Java
LVS
ModelSim
Parasitic Extraction
Perl
Physical Verification
Semiconductors
Simulations
SoC
TCL
Virtuoso
CAD
Design
IC
Lorraine Bell Summary
Lorraine Bell, based in Beaverton, OR, US, is currently a Design Automation Engineer at Intel Corporation. Lorraine Bell brings experience from previous roles at Cirrus Logic, AMD, IC-Enable and Cadence Design Systems. Lorraine Bell holds a 1984 - 1987 BS in Computer Science @ Pacific Lutheran University. With a robust skill set that includes C, C++, CMOS, Cadence, Cadence Virtuoso and more. Lorraine Bell has 1 emails and 6 mobile phone numbers on RocketReach.
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