Loi do Location
Sainte-Marthe-sur-le-Lac, QC, CA
Loi do Work
- 2012 - now Design Engineer @ Comport-data Inc
- 2008 - 2010 Physical and Layout designer @ Intel Corporation
- 2001 - 2005 RTL and ASIC designer @ Zarlink Semiconductor is now Microsemi
- 1998 - 2001 RTL and ASIC designer @ Mitel
- 1996 - 1998 RTL designer @ GEC Plessey Semiconductor
Loi do Education
- Bath University, City of Bath
Loi do Skills
- TCL
- VLSI
- NCSim
- Primetime
- Microsoft Office
- LVS
- Circuit Design
- Engineering
- Testing
- RTL design
Loi do Summary
Loi do, based in Sainte-Marthe-sur-le-Lac, QC, CA, is currently a Design Engineer at Comport-data Inc. Loi do brings experience from previous roles at Intel Corporation, Zarlink Semiconductor, Mitel Semiconductor and GEC Plessey Semiconductor. Loi do holds a Bath University, City of Bath. With a robust skill set that includes TCL, VLSI, NCSim, Primetime, Microsoft Office and more. Loi do has 1 emails on RocketReach.
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