Loi do Email
Design Engineer
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Loi do Location
- Sainte-Marthe-sur-le-Lac, QC, CA
Loi do Work
- Design Engineer @ Comport-data Inc (June 2012 - Present)
- Physical and Layout designer @ (November 2008 - March 2010)
- RTL and ASIC designer @ (January 2001 - January 2005)
- RTL and ASIC designer @ (January 1998 - January 2001)
- RTL designer @ GEC Plessey Semiconductor (January 1996 - January 1998)
Loi do Education
- Bath University, City of Bath
Master of Engineering honours degree (Electronic and Communication)
- Tresham College, Kettering, Northamptonshire
A-level (Mathematics, Physic and Chemistry)
Loi do Skills
- TCL
- VLSI
- NCSim
- Primetime
- Microsoft Office
- LVS
- Circuit Design
- Engineering
- Testing
- RTL design
- Rtl
- Logic Synthesis
- Hardware Architecture
- Microelectronics
- Project Management
- Java
- Adobe Creative Suite
- Application Specific Integrated Circuits Asic
- Timing Closure
- EDA
- Low Power Design
- Verilog
- Static Timing Analysis
- ASIC
- Physical Verification
- Mixed Signal
- SystemVerilog
- VHDL
- Silicon
- DFT
- Integrated Circuit Design
- Hardware Design
- Digital Design
- Cadence Virtuoso
- DRC
- ModelSim
- RTL coding
- Formal Verification
- Floorplanning
- SoC
- Functional Verification
- CMOS
- PLL
- Spectre
- Clock Tree Synthesis
- Physical Design
- Logic Design
- Application Specific Integrated Circuits
Loi do Summary
- Loi do, based in Sainte-Marthe-sur-le-Lac, QC, CA, is currently a Design Engineer at Comport-data Inc. Loi do brings experience from previous roles at Intel Corporation, Zarlink Semiconductor, Mitel Semiconductor and GEC Plessey Semiconductor. Loi do holds a Master of Engineering honours degree in Electronic and Communication @ Bath University, City of Bath. With a robust skill set that includes TCL, VLSI, NCSim, Primetime, Microsoft Office and more. Loi do has 1 emails on RocketReach.
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