Leo Jose Email & Phone Number
Sr. Principal ASIC Design @ NXP Semiconductors
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Leo Jose Location
- United States
Leo Jose Work
- 2019 -now Sr. Principal ASIC Design @
- 2019 -now Sr. Principal @
- 2011 -2019 Sr. Staff ASIC Design Engineer @
- 2011 -2019 Sr. Staff Design Engineer (ASIC and FPGA) @
- 2008 -2011 Hardware Engineer IV @
- 2008 -2011 Senior FPGA Design Engineer @
- 2006 -2008 Hardware Engineer (Consultant) @
- 2006 -2008 Senior Design Engineer Consultant @
- 2005 -2006 Senior Design Engineer @
Leo Jose Education
- Goa University
Bachelor of Engineering (Electronics and Telecommunications)
Leo Jose Skills
- ASIC
- Xilinx
- FPGA
- SoC
- Processors
- Embedded Systems
- ModelSim
- Mixed Signal
- Integrated Circuit Design
- RTL design
- Altera
- Synopsys tools
- AMBA Interconnect
- ARM Cortex-M3
- WiMAX
- IEEE 802.11 a/b/g/n/ac
- WiFi
- SRIO
- Nios II
- VHDL
- Debugging
- SystemVerilog
- Digital Signal Processors
- TCL
- Firmware
- Hardware Architecture
- Logic Synthesis
- Arm Cortex M3
- Semiconductors
Leo Jose Summary
- Leo Jose, based in United States, is currently a Sr. Principal ASIC Design at NXP Semiconductors. Leo Jose brings experience from previous roles at NXP Semiconductors, Marvell Semiconductor and Cisco Systems. Leo Jose holds a Bachelor of Engineering in Electronics and Telecommunications @ Goa University. With a robust skill set that includes ASIC, Xilinx, FPGA, SoC, Processors and more. Leo Jose has 2 emails and 2 mobile phone numbers on RocketReach.
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