Lei Luo's Location
Fremont, CA, US
Lei Luo's Work
- Principal Design Engineer @ STMicroelectronics
- Enginner @ Genesis Microchip
Lei Luo's Education
- Oregon State University
MS (EE)
1986 - 1990 - Beijing University of Posts and Telecommunications
BS (telecommunications)
1980 - 1984 - Wuhan University
b.s. (electrical engineering)
1978 - 1982
Lei Luo's Skills
- Software Development
- Graphic Design
- Strategic Planning
- SoC
- Integrated Circuit Design
- RTL design
- Low Power Design
- Verilog
- Manufacturing
- Timing Closure
Lei Luo's Summary
Lei Luo, based in Fremont, CA, US, is currently a Principal Design Engineer at ST Microelectronics, bringing experience from previous roles at Genesis Microchip. Lei Luo holds a 1986 - 1990 MS in EE @ Oregon State University. With a robust skill set that includes Software Development, Graphic Design, Strategic Planning, SoC, Integrated Circuit Design and more, Lei Luo contributes valuable insights to the industry. Lei Luo has 1 email and 1 mobile phone number on RocketReach.
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