Le Wang Email
ASIC and RTL Designer @ Google
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Le Wang Location
- New York, NY, US
Le Wang Work
- 2019 -now ASIC and RTL Designer @
- 2016 -2019 ASIC Design Engineer @
- 2015 -2015 Design Verification Engineer Intern @
- 2014 -2014 Software Engineering Intern @
- 2013 -2014 Undergraduate Research Assistant @
Le Wang Education
- Stanford University
Master of Science (M.S.) (Master of Science (M.S.), Electrical Engineering)
- University of Illinois at Urbana-Champaign
Bachelor of Science (B.S.) (Bachelor of Science (B.S.), Major in Electrical Engineering, Minor in Computer Science)
Le Wang Skills
- C/C++
- Computer Architecture
- Field Programmable Gate Arrays Fpga
- Algorithms
- C
- Digital IC Design
- Matlab
- ASIC
- VLSI
- Verilog
- System Programming
- Artificial Intelligence
- Microsoft Office
- Java
- Testing
- Microsoft Excel
- FPGA
- VHDL
- C++
- Python
- SystemVerilog
- Design
- x86 Assembly
- Software Development
- Very Large Scale Integration Vlsi
- C#
- Very Large Scale Integration
- Field Programmable Gate Arrays
Le Wang Summary
- Le Wang, based in New York, NY, US, is currently a ASIC and RTL Designer at Google. Le Wang brings experience from previous roles at AMD, Imagine Communications and University of Illinois at Urbana-Champaign. Le Wang holds a Master of Science (M.S.) in Master of Science (M.S.), Electrical Engineering @ Stanford University. With a robust skill set that includes C/C++, Computer Architecture, Field Programmable Gate Arrays Fpga, Algorithms, C and more. Le Wang has 4 emails on RocketReach.
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